IEC PAS 62647-3:2011 pdf – Process management for avionics – Aerospace and defence electronic systemscontaining lead-free solder – Part 3: Performance testing for systems containing lead-free solder and finishes
IEC PAS 62647-3:2011 pdf – Process management for avionics – Aerospace and defence electronic systemscontaining lead-free solder – Part 3: Performance testing for systems containing lead-free solder and finishes.
4.2.2 Default Test Parameters
The Isothermal aging of assembled test vehicles should consist of 100 C for 24 hours. These isothermal aging parameters will not represent all apphcalions. so the preconditioning exposure should be tailored as necessary to meet the goals of a particular test program.
4.3 Default Temperature Cycle Test Method
4.3.1 Test Parameters
The temperature cycle test parameters, test temperature ranges, and thermal cycle test duration shall be in accordance with IPC-9701A sections 3.4,3. 5.1 and 5.2. Test monitoring requirements shall be in accordance with IPC-9701A Table 4-4. The default test temperatures shall be —55 C to 125 °C and the duration shall be 1000 cycles. The ramp shall be less than 20C lminute and the dwell shall be 15 minutes minimum, The PWB assembly must reach temperature for the dwell time duration as defined In IPC-9701A. Ramp rates, other than those specified here may be used but only If material characterization or data supports a change. (Refer to Section 5.2 of this standard.)
NOTE I The —33 C lower limit is selected based on defence requirements (e.g.. performance, storage, etc I However, it the user is interested In determining acceleration facLor at this temperature. behavioral taciors must be considered, Refer to NOTE I In Section 5.2. AccordIngly, use of —55 C ready accommodates a ‘gono-go’ type test, ii.. straghl prformance test
4.3.2 Test Duration
The number of temperature cycles (01 duration) shall be sufficient enough to evaluate the expected performance of the samples In the required applications. Continuing the test to complete failure, or to > 75 % failure of all samples is recommended in order to obtain proper statistical metrics.
NOTE I In most cases. 1000 cycles may be sufficient 1000 cycles is considered a standard duration for many conlpanie&organ&zations. However, table 4-1 of 1PC.9701A provides additional guidance for duration values.
NOTE 2 Section 4.3.4. of this document, provides further information about the number of temperature cycles end their Interpretation with respect to service life.
4.3.3 FaIlure D.t.rmlnatlon and AnalysIs
Failure determination can be performed by either of two methods.
One method Is to define and monitor failure per the daisy-chain monitoring method as described In IPC-9701A. Section 4.3.3. Implementation of this method requires the manufacture of special-purpose assemblies constructed from special-purpose test components and test boards. This method is therefore not generally applicable to standard functional hardware.
The second method is to monitor electrical performance of functioning circuit card assemblies continuously during test.
For each of these two methods, the test monitoring and failure criteria shall be fully documented
Traditionally, for Tin-Lead solder, a third method has occasionally been used. i.e., failure analysis via optical criteria. For Lead-free (Pb-free) solders, this method is not recommended. The failure modes of most Lead-free (Pb-free) solders, as known at this time, would render the optical approach useless since the cracks tend to be extremely small and cannot be reliably discerned against the naturally frosty and fissured surface of Lead-free (Pb-free) solder.
Failure analysis shall be performed in accordance with the test plan, on a minimum of three components per test board type. Typical candidates for failure analysis include: early and failures that fall near the statistical fit, and failures that deviate from the statistical fit.
Techniques for failure analysis may include methods such as “dye and pry” or cross- sectioning, as appropriate for the components in question. Failure modes shall be documented- The most important information to be obtained from the failure analysis is whether or not the failure is associated with the solder interconnection, or whether it relates to the package or board, or some other non-solder related failure, Beyond this, failure analysis should also provide information on where solder joint failures occur (within the bulk solder or at the intermetallic layer or inlerface) Results may also distinguish between fracture modes within the solder Grouping of different failure modes may result in incorrect and/or misleading test conclusions. Failure analysis efforts should be conducted to insure that individual failure modes are identified and characterized to avoid the confounding of statistical analyses.